Attachment #397890 for bug #633044

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	}

	/* Offset into the new buffer for cases of shared fbs between CRTCs */
	offset = crtc->y * fb->pitch + crtc->x * fb->bits_per_pixel/8;
	offset += (crtc->y * fb->pitch) + (crtc->x * (fb->bits_per_pixel) / 8);

	BEGIN_LP_RING(4);
	if (IS_I965G(dev)) {
		OUT_RING(MI_DISPLAY_FLIP |
			 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
		OUT_RING(fb->pitch);
		OUT_RING(obj_priv->gtt_offset | obj_priv->tiling_mode);
		pipesrc = I915_READ(pipesrc_reg); 
		OUT_RING(pipesrc & 0x0fff0fff);
	} else if (IS_GEN3(dev) || IS_GEN2(dev)) {
		OUT_RING(MI_DISPLAY_FLIP_I915 |
			 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
		OUT_RING(fb->pitch);
		OUT_RING(obj_priv->gtt_offset + offset);
		OUT_RING(MI_NOOP);
	} else {
		OUT_RING(MI_DISPLAY_FLIP |
			 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
		OUT_RING(fb->pitch);
		OUT_RING(obj_priv->gtt_offset);
		OUT_RING(MI_NOOP);
	}
	ADVANCE_LP_RING();

Return to bug 633044

Lines 4303-4330 static int intel_crtc_page_flip(struct drm_crtc *crtc, Link Here

(-)a/drivers/gpu/drm/i915/intel_display.c (-6 / +5 lines)
4303	}	4303	}
4304		4304
4305	/* Offset into the new buffer for cases of shared fbs between CRTCs */	4305	/* Offset into the new buffer for cases of shared fbs between CRTCs */
4306	offset = obj_priv->gtt_offset;	4306	offset = crtc->y * fb->pitch + crtc->x * fb->bits_per_pixel/8;
4307	offset += (crtc->y * fb->pitch) + (crtc->x * (fb->bits_per_pixel) / 8);
4308		4307
4309	BEGIN_LP_RING(4);	4308	BEGIN_LP_RING(4);
4310	if (IS_I965G(dev)) {	4309	if (IS_I965G(dev)) {
4311	OUT_RING(MI_DISPLAY_FLIP \|	4310	OUT_RING(MI_DISPLAY_FLIP \|
4312	MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));	4311	MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
4313	OUT_RING(fb->pitch);	4312	OUT_RING(fb->pitch);
4314	OUT_RING(offset \| obj_priv->tiling_mode);	4313	OUT_RING(obj_priv->gtt_offset \| obj_priv->tiling_mode);
4315	pipesrc = I915_READ(pipesrc_reg);	4314	pipesrc = I915_READ(pipesrc_reg);
4316	OUT_RING(pipesrc & 0x0fff0fff);	4315	OUT_RING(pipesrc & 0x0fff0fff);
4317	} else if (IS_GEN3(dev)) {	4316	} else if (IS_GEN3(dev) \|\| IS_GEN2(dev)) {
4318	OUT_RING(MI_DISPLAY_FLIP_I915 \|	4317	OUT_RING(MI_DISPLAY_FLIP_I915 \|
4319	MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));	4318	MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
4320	OUT_RING(fb->pitch);	4319	OUT_RING(fb->pitch);
4321	OUT_RING(offset);	4320	OUT_RING(obj_priv->gtt_offset + offset);
4322	OUT_RING(MI_NOOP);	4321	OUT_RING(MI_NOOP);
4323	} else {	4322	} else {
4324	OUT_RING(MI_DISPLAY_FLIP \|	4323	OUT_RING(MI_DISPLAY_FLIP \|
4325	MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));	4324	MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
4326	OUT_RING(fb->pitch);	4325	OUT_RING(fb->pitch);
4327	OUT_RING(offset);	4326	OUT_RING(obj_priv->gtt_offset);
4328	OUT_RING(MI_NOOP);	4327	OUT_RING(MI_NOOP);
4329	}	4328	}
4330	ADVANCE_LP_RING();	4329	ADVANCE_LP_RING();