Attachment #48902 for bug #114144

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Lines 26-32 Link Here

(-)i810.orig/Imakefile (-1 / +1 lines)
26	DRISRCS = $(I810DRISRCS) $(I830DRISRCS)	26	DRISRCS = $(I810DRISRCS) $(I830DRISRCS)
27	DRIOBJS = $(I810DRIOBJS) $(I830DRIOBJS)	27	DRIOBJS = $(I810DRIOBJS) $(I830DRIOBJS)
28	DRIINCLUDES = -I$(SERVERSRC)/GL/dri -I$(LIBSRC)/GL/dri \	28	DRIINCLUDES = -I$(SERVERSRC)/GL/dri -I$(LIBSRC)/GL/dri \
29	-I$(TOP)/include -I$(DRMSRCDIR)/shared	29	-I$(TOP)/include -I$(DRMSRCDIR)/shared-core
30	DRIDEFINES = $(GLX_DEFINES)	30	DRIDEFINES = $(GLX_DEFINES)
31	#endif	31	#endif
32		32




      dspbase = DSPBBASE;
   }

   /* To ensure gamma is enabled we need to turn off and on the plane */
   temp = INREG(dspreg);
   OUTREG(dspreg, temp & ~(1<<31));
   OUTREG(dspbase, INREG(dspbase));
   OUTREG(dspreg, temp | DISPPLANE_GAMMA_ENABLE);
   OUTREG(dspbase, INREG(dspbase));

   /* It seems that an initial read is needed. */

         r = colors[index].red;
         g = colors[index].green;
         b = colors[index].blue;
	 val = (r << 16) | (g << 8) | b;
         for (j = 0; j < 8; j++) {
	    val = (r << 16) | (g << 8) | b;
	    OUTREG(palreg + index * 32 + (j * 4), val);
         }
      }
      break;
   case 16:
      for (i = 0; i < numColors; i++) {
         index = indices[i / 2];
         r = colors[index].red;
         b = colors[index].blue;
         index = indices[i];
	 r   = colors[index / 2].red;
	 g   = colors[index].green;
	 b   = colors[index / 2].blue;

	 val = (r << 16) | (g << 8) | b;
	 OUTREG(palreg + index * 16, val);

	 OUTREG(palreg + index * 16 + 8, val);
	 OUTREG(palreg + index * 16 + 12, val);

   	 if (index <= 31) {
            r   = colors[index].red;
	    g   = colors[(index * 2) + 1].green;
	    b   = colors[index].blue;

	    val = (r << 16) | (g << 8) | b;
	    OUTREG(palreg + index * 32, val);
	    OUTREG(palreg + index * 32 + 4, val);
	    OUTREG(palreg + index * 32 + 8, val);
	    OUTREG(palreg + index * 32 + 12, val);
	 }
      }
      break;
   default:

   DPRINTF(PFX, "I830BIOSAdjustFrame: y = %d (+ %d), x = %d (+ %d)\n",
	   x, pI830->xoffset, y, pI830->yoffset);

   /* Sync the engine before adjust frame */
   if (!pI830->noAccel)
      (*pI830->AccelInfoRec->Sync)(pScrn);

   /* The i830M just happens to have some problems programming offsets via
    * this VESA BIOS call. Especially in dual head configurations which
    * have high resolutions which cause the DSP{A,B}BASE registers to be


   DPRINTF(PFX, "I830BIOSSwitchMode: mode == %p\n", mode);

   /* Sync the engine before mode switch */
   if (!pI830->noAccel)
      (*pI830->AccelInfoRec->Sync)(pScrn);


Return to bug 114144

Lines 1736-1742 Link Here

(-)i810.orig/i830_driver.c (-15 / +24 lines)
1736	dspbase = DSPBBASE;	1736	dspbase = DSPBBASE;
1737	}	1737	}
1738		1738
1739	OUTREG(dspreg, INREG(dspreg) \| DISPPLANE_GAMMA_ENABLE);	1739	/* To ensure gamma is enabled we need to turn off and on the plane */
		1740	temp = INREG(dspreg);
		1741	OUTREG(dspreg, temp & ~(1<<31));
		1742	OUTREG(dspbase, INREG(dspbase));
		1743	OUTREG(dspreg, temp \| DISPPLANE_GAMMA_ENABLE);
1740	OUTREG(dspbase, INREG(dspbase));	1744	OUTREG(dspbase, INREG(dspbase));
1741		1745
1742	/* It seems that an initial read is needed. */	1746	/* It seems that an initial read is needed. */
Lines 1749-1767 Link Here
1749	r = colors[index].red;	1753	r = colors[index].red;
1750	g = colors[index].green;	1754	g = colors[index].green;
1751	b = colors[index].blue;	1755	b = colors[index].blue;
		1756	val = (r << 16) \| (g << 8) \| b;
1752	for (j = 0; j < 8; j++) {	1757	for (j = 0; j < 8; j++) {
1753	val = (r << 16) \| (g << 8) \| b;
1754	OUTREG(palreg + index * 32 + (j * 4), val);	1758	OUTREG(palreg + index * 32 + (j * 4), val);
1755	}	1759	}
1756	}	1760	}
1757	break;	1761	break;
1758	case 16:	1762	case 16:
1759	for (i = 0; i < numColors; i++) {	1763	for (i = 0; i < numColors; i++) {
1760	index = indices[i / 2];
1761	r = colors[index].red;
1762	b = colors[index].blue;
1763	index = indices[i];	1764	index = indices[i];
1764	g = colors[index].green;	1765	r = colors[index / 2].red;
		1766	g = colors[index].green;
		1767	b = colors[index / 2].blue;
1765		1768
1766	val = (r << 16) \| (g << 8) \| b;	1769	val = (r << 16) \| (g << 8) \| b;
1767	OUTREG(palreg + index * 16, val);	1770	OUTREG(palreg + index * 16, val);
Lines 1769-1783 Link Here
1769	OUTREG(palreg + index * 16 + 8, val);	1772	OUTREG(palreg + index * 16 + 8, val);
1770	OUTREG(palreg + index * 16 + 12, val);	1773	OUTREG(palreg + index * 16 + 12, val);
1771		1774
1772	i++;	1775	if (index <= 31) {
1773	index = indices[i];	1776	r = colors[index].red;
1774	g = colors[index].green;	1777	g = colors[(index * 2) + 1].green;
		1778	b = colors[index].blue;
1775		1779
1776	val = (r << 16) \| (g << 8) \| b;	1780	val = (r << 16) \| (g << 8) \| b;
1777	OUTREG(palreg + index * 16, val);	1781	OUTREG(palreg + index * 32, val);
1778	OUTREG(palreg + index * 16 + 4, val);	1782	OUTREG(palreg + index * 32 + 4, val);
1779	OUTREG(palreg + index * 16 + 8, val);	1783	OUTREG(palreg + index * 32 + 8, val);
1780	OUTREG(palreg + index * 16 + 12, val);	1784	OUTREG(palreg + index * 32 + 12, val);
		1785	}
1781	}	1786	}
1782	break;	1787	break;
1783	default:	1788	default:
Lines 4863-4868 Link Here
4863	DPRINTF(PFX, "I830BIOSAdjustFrame: y = %d (+ %d), x = %d (+ %d)\n",	4868	DPRINTF(PFX, "I830BIOSAdjustFrame: y = %d (+ %d), x = %d (+ %d)\n",
4864	x, pI830->xoffset, y, pI830->yoffset);	4869	x, pI830->xoffset, y, pI830->yoffset);
4865		4870
		4871	/* Sync the engine before adjust frame */
		4872	if (!pI830->noAccel)
		4873	(*pI830->AccelInfoRec->Sync)(pScrn);
		4874
4866	/* The i830M just happens to have some problems programming offsets via	4875	/* The i830M just happens to have some problems programming offsets via
4867	* this VESA BIOS call. Especially in dual head configurations which	4876	* this VESA BIOS call. Especially in dual head configurations which
4868	* have high resolutions which cause the DSP{A,B}BASE registers to be	4877	* have high resolutions which cause the DSP{A,B}BASE registers to be
Lines 5319-5325 Link Here
5319		5328
5320	DPRINTF(PFX, "I830BIOSSwitchMode: mode == %p\n", mode);	5329	DPRINTF(PFX, "I830BIOSSwitchMode: mode == %p\n", mode);
5321		5330
5322	/* Stops head pointer freezes for 845G */	5331	/* Sync the engine before mode switch */
5323	if (!pI830->noAccel)	5332	if (!pI830->noAccel)
5324	(*pI830->AccelInfoRec->Sync)(pScrn);	5333	(*pI830->AccelInfoRec->Sync)(pScrn);
5325		5334