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Lines 76-81
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| 76 |
extern acpi_interrupt_flags acpi_sci_flags; |
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extern acpi_interrupt_flags acpi_sci_flags; |
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int __initdata acpi_force = 0; |
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int __initdata acpi_force = 0; |
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#endif |
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#endif |
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#ifdef CONFIG_SMP |
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static int amd_pdc_disable = 0; |
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#endif |
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int acpi_numa __initdata; |
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int acpi_numa __initdata; |
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Lines 366-371
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| 366 |
iommu_setup(from+6); |
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iommu_setup(from+6); |
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} |
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} |
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#endif |
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#endif |
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#ifdef CONFIG_SMP |
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if (!memcmp(from, "pdc=off", 6)) |
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amd_pdc_disable = 1; |
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#endif |
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if (!memcmp(from,"oops=panic", 10)) |
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if (!memcmp(from,"oops=panic", 10)) |
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panic_on_oops = 1; |
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panic_on_oops = 1; |
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Lines 798-803
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| 798 |
#endif |
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#endif |
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} |
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} |
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static inline void amd_disable_advanced_pdc(void) |
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{ |
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__asm__ __volatile__ ( |
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" movl $0x9c5a203a,%%edi \n" /* msr enable */ |
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" movl $0xC0011023,%%ecx \n" /* msr addr */ |
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" rdmsr \n" /* get reg val */ |
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" orl $0x00000001,%%edx \n" /* set bit 32 */ |
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" wrmsr \n" /* put it back */ |
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" xorl %%edi, %%edi \n" /* clear msr enable */ |
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: /* no outputs */ |
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: /* no inputs, either */ |
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: "%eax","%ecx","%edx","%edi" /* clobbered regs */ ); |
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} |
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static int __init init_amd(struct cpuinfo_x86 *c) |
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static int __init init_amd(struct cpuinfo_x86 *c) |
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{ |
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{ |
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int r; |
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int r; |
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Lines 812-817
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if ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58) |
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if ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58) |
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set_bit(X86_FEATURE_K8_C, &c->x86_capability); |
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set_bit(X86_FEATURE_K8_C, &c->x86_capability); |
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#ifdef CONFIG_SMP |
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if (amd_pdc_disable) { |
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int family; |
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family = (level & 0xf00) >> 8; |
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if (family == 0x0f) |
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family += (level & 0xff00000) >> 20; |
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if (family == 0x0f || family == 0x10) { |
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/* printk(KERN_INFO "Disabling advanced PDC\n"); */ |
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amd_disable_advanced_pdc(); |
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} |
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} |
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#endif |
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r = get_model_name(c); |
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r = get_model_name(c); |
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if (!r) { |
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if (!r) { |
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switch (c->x86) { |
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switch (c->x86) { |